The 8Gb DDR4 SDRAM C-die is organized as a 64Mbit x 16 I/Os x 8banks device.This synchronous device achieves high speed double-data-rate transfer rates of up to 2666Mb/sec/pin(DDR4-2666)for general applications.

The chip is designed to comply with the following key DDR4 SDRAM features such as posted CAS,Programmable CWL,Internal(Self)Calibration,On Die Termination using ODT pin and Asynchronous Reset.All of the control and address inputs are synchronized with a pair of externally supplied differential clocks.Inputs are latched at the crosspoint of differential clocks(CK rising and CK falling).All I/Os are synchronized with a pair of bidirectional strobes(DQS and DQS)in a source synchronous fashion.The address bus is used to convey row,column,and bank address information in a RAS/CAS multiplexing style.The DDR4 device operates with a single 1.2V(1.14V~1.26V)power supply,1.2V(1.14V~1.26V)VDDQ and 2.5V(2.375V~2.75V)VPP.The 8Gb DDR4 C-die device is available in 96ball FBGAs(x16).